• Coverage: Appendix A, B, C, Section 2.1~3
• Recommended reading: Sections A.1, A.2, A.3, B.9, C.1, C.3, C.4, 1.9, 2.1, 2.2, 2.3
• Please review quizzes and homework
  
• 90-minute exam
  

Chapter 1 Introduction

• Introduction I
  
• Introduction II
  

• Machine language
• Datapath and control
• Pipeline
  

• Cache
• Virtual memory
  

• ILP and loop unrolling
• Branch prediction
  
• Dynamic scheduling (Tomasulo Algorithm Example)
• Hardware speculation and VLIW
  

Chapter 3 Limits on Instruction-level Parallelism

• Limits to ILP and SMT
  

Chapter 4 Multiprocessors

• Introduction and Cache coherency
• Interconnection networks and Directory-based Cache Protocol
• Synchronization and Memory Consistency
  

Chapter 5 Memory Hierarchy

• Eleven advanced optimizations of cache performance
• Memory technology and virtual machine
  

Chapter 6 Storage Systems

• RAID and queueing modeling