{"id":123,"date":"2023-02-14T02:45:08","date_gmt":"2023-02-14T02:45:08","guid":{"rendered":"https:\/\/academic.csuohio.edu\/chu-pong\/?page_id=123"},"modified":"2023-03-09T18:54:59","modified_gmt":"2023-03-09T18:54:59","slug":"sv-mcs-book","status":"publish","type":"page","link":"https:\/\/academic.csuohio.edu\/chu-pong\/sv-mcs-book\/","title":{"rendered":"FPGA SystemVerilog book"},"content":{"rendered":"\n<h1 class=\"wp-block-heading\"><strong><em>FPGA Prototyping by SystemVerilog Examples<\/em><\/strong><\/h1>\n\n\n\n<figure class=\"wp-block-image size-full is-resized\"><img loading=\"lazy\" decoding=\"async\" src=\"https:\/\/academic.csuohio.edu\/chu-pong\/wp-content\/uploads\/sites\/64\/2023\/03\/cover_sv.jpg\" alt=\"\" class=\"wp-image-327\" width=\"172\" height=\"245\" srcset=\"https:\/\/academic.csuohio.edu\/chu-pong\/wp-content\/uploads\/sites\/64\/2023\/03\/cover_sv.jpg 351w, https:\/\/academic.csuohio.edu\/chu-pong\/wp-content\/uploads\/sites\/64\/2023\/03\/cover_sv-211x300.jpg 211w\" sizes=\"auto, (max-width: 172px) 100vw, 172px\" \/><\/figure>\n\n\n\n<p>This web page provides relevant materials for the&nbsp;<em>FPGA Prototyping by SystemVerilog Examples: Xilinx MicroBlaze MCS SoC&nbsp;<\/em>text<\/p>\n\n\n\n<h3 class=\"wp-block-heading\">SystemVerilog vs. Verilog in RTL design<\/h3>\n\n\n\n<ul class=\"wp-block-list\">\n<li><a href=\"https:\/\/academic.csuohio.edu\/chu-pong\/wp-content\/uploads\/sites\/64\/2023\/02\/SystemVerilog-vs-Verilog-in-RTL-design.pdf\" data-type=\"attachment\" data-id=\"122\" target=\"_blank\" rel=\"noopener\">pdf file<\/a><\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\">General<\/h3>\n\n\n\n<ul class=\"wp-block-list\">\n<li><a href=\"https:\/\/academic.csuohio.edu\/chu-pong\/wp-content\/uploads\/sites\/64\/2023\/02\/fpga_sv_color_figure.pdf\" data-type=\"attachment\" data-id=\"117\" target=\"_blank\" rel=\"noopener\">Color figures<\/a>&nbsp;(supplement to the printed version)<\/li>\n\n\n\n<li><a href=\"https:\/\/academic.csuohio.edu\/chu-pong\/wp-content\/uploads\/sites\/64\/2023\/02\/appendix_revised.pdf\" data-type=\"attachment\" data-id=\"127\" target=\"_blank\" rel=\"noopener\">Updated FPro System Development Tutorial<\/a><\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Source codes<\/strong><\/h3>\n\n\n\n<ul class=\"wp-block-list\">\n<li>read_me file:&nbsp;<a href=\"https:\/\/academic.csuohio.edu\/chu-pong\/wp-content\/uploads\/sites\/64\/2023\/02\/readme_sv_source_code.pdf\" data-type=\"attachment\" data-id=\"120\">readme_source_code.pdf<\/a><\/li>\n\n\n\n<li>source file:&nbsp;<a href=\"https:\/\/drive.google.com\/file\/d\/1mmshyOjEAbrvJ4-zNcyySYDJB4YFyeS6\/view?usp=sharing\" data-type=\"URL\" data-id=\"https:\/\/drive.google.com\/file\/d\/1mmshyOjEAbrvJ4-zNcyySYDJB4YFyeS6\/view?usp=sharing\">fpga_mcs_sv_src <\/a>.zip&nbsp;(last updated 05\/19\/2018)<\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Basys 3 supplement materials<\/strong><\/h3>\n\n\n\n<ul class=\"wp-block-list\">\n<li>read_me file:&nbsp;<a href=\"https:\/\/academic.csuohio.edu\/chu-pong\/wp-content\/uploads\/sites\/64\/2023\/02\/readme_basys3_sv_adoption_v10.pdf\" data-type=\"attachment\" data-id=\"119\">readme_basys3_adoption.pdf<\/a><\/li>\n\n\n\n<li>source file:&nbsp;<a href=\"https:\/\/academic.csuohio.edu\/chu-pong\/wp-content\/uploads\/sites\/64\/2023\/02\/basys3_supplement_src.zip\" data-type=\"attachment\" data-id=\"116\">basys3_supplement_src.zip<\/a>&nbsp;(last updated 12\/05\/2017)<\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Arty A7 supplement materials<\/strong><\/h3>\n\n\n\n<ul class=\"wp-block-list\">\n<li>read_me file:&nbsp;<a href=\"https:\/\/academic.csuohio.edu\/chu-pong\/wp-content\/uploads\/sites\/64\/2023\/02\/readme_arty_a7_sv_adoption.pdf\" data-type=\"attachment\" data-id=\"118\">readme_arty_a7_adoption.pdf<\/a><\/li>\n\n\n\n<li>source file:&nbsp;<a href=\"https:\/\/academic.csuohio.edu\/chu-pong\/wp-content\/uploads\/sites\/64\/2023\/02\/arty_supplement_src.zip\" data-type=\"attachment\" data-id=\"115\">arty_supplement_src.zip<\/a>&nbsp;(last updated 12\/05\/2017)<\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\">Project files w\/ Nexys 4 DDR board (in Vivado v2017.2)<\/h3>\n\n\n\n<ul class=\"wp-block-list\">\n<li><a href=\"https:\/\/drive.google.com\/file\/d\/1PYgh3Q1O0NoMoIW4roYz3gD5hqt0Ng5h\/view?usp=sharing\">nexys4_sv_vanilla.xpr.zip <\/a><\/li>\n\n\n\n<li><a href=\"https:\/\/drive.google.com\/file\/d\/17OwjfnGPM3Y3Cna3e1SNpypGBP48JBNR\/view?usp=sharing\" data-type=\"URL\" data-id=\"https:\/\/drive.google.com\/file\/d\/17OwjfnGPM3Y3Cna3e1SNpypGBP48JBNR\/view?usp=sharing\">nexys4_sv_sampler.xpr.zip <\/a><\/li>\n\n\n\n<li><a href=\"https:\/\/drive.google.com\/file\/d\/1gqWKOvcpBylrntyNBOvQKG9hRTdRNfZd\/view?usp=sharing\">nexys4_sv_video.xpr.zip <\/a><\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\">Project files w\/ Basys 3 board (in Vivado v2017.2)<\/h3>\n\n\n\n<ul class=\"wp-block-list\">\n<li><\/li>\n<\/ul>\n\n\n\n<ul class=\"wp-block-list\">\n<li><a href=\"https:\/\/drive.google.com\/file\/d\/1XhFD8_0Lat9BSFQg81usptelGw9-f_2o\/view?usp=share_link\">basys3_sv_vanilla.xpr.zip <\/a><\/li>\n\n\n\n<li><a href=\"https:\/\/drive.google.com\/file\/d\/1E67wMRcE5-8UpJ7ZqDZumK3aMuusdE2D\/view?usp=share_link\">basys3_sv_sampler.xpr.zip <\/a><\/li>\n\n\n\n<li><a href=\"https:\/\/drive.google.com\/file\/d\/1thuHw8vuXNtg6RTADDZ7oeu5Go_aOuE7\/view?usp=share_link\">basys3_sv_video.xpr.zip <\/a><\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\">Project files w\/ Arty A7 board (in Vivado v2017.2)<\/h3>\n\n\n\n<ul class=\"wp-block-list\">\n<li><a href=\"https:\/\/drive.google.com\/file\/d\/1Ut7hYr84LwCFUBzzAV61lNJhdbZ94J15\/view?usp=share_link\">arty_sv_vanilla.xpr.zip <\/a><\/li>\n\n\n\n<li><a href=\"https:\/\/drive.google.com\/file\/d\/1Xnts1y_Z8Ve1IBWWH5ycKl94FAMsnum5\/view?usp=share_link\">arty_sv_sampler.xpr.zip <\/a><\/li>\n\n\n\n<li><a href=\"https:\/\/drive.google.com\/file\/d\/1dNxVffN_OcKjkZvWh8WeHqQjT7aHwpjP\/view?usp=sharing\">arty_sv_video.xpr.zip <\/a><\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Instructional materials<\/strong><\/h3>\n\n\n\n<p>The files are for the course instructors only and are password protected.&nbsp;Please send Dr. Chu an e-mail with a web link that can verify your status.&nbsp;<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><a href=\"https:\/\/drive.google.com\/file\/d\/1e2ZvcCzcOt75BxA2H9h-dhqx1p9SVbkf\/view?usp=sharing\" target=\"_blank\" rel=\"noopener\">Figures and tables <\/a><\/li>\n<\/ul>\n","protected":false},"excerpt":{"rendered":"<p>FPGA Prototyping by SystemVerilog Examples This web page provides relevant materials for the&nbsp;FPGA Prototyping by SystemVerilog Examples: Xilinx MicroBlaze MCS SoC&nbsp;text SystemVerilog vs. Verilog in RTL design General Source codes Basys 3 supplement materials Arty A7 supplement materials Project files w\/ Nexys 4 DDR board (in Vivado v2017.2) Project files w\/ Basys 3 board (in&mldr;<\/p>\n","protected":false},"author":39,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"_relevanssi_hide_post":"","_relevanssi_hide_content":"","_relevanssi_pin_for_all":"","_relevanssi_pin_keywords":"","_relevanssi_unpin_keywords":"","_relevanssi_related_keywords":"","_relevanssi_related_include_ids":"","_relevanssi_related_exclude_ids":"","_relevanssi_related_no_append":"","_relevanssi_related_not_related":"","_relevanssi_related_posts":"","_relevanssi_noindex_reason":"","footnotes":""},"class_list":["post-123","page","type-page","status-publish","hentry"],"featured_image_src":null,"_links":{"self":[{"href":"https:\/\/academic.csuohio.edu\/chu-pong\/wp-json\/wp\/v2\/pages\/123","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/academic.csuohio.edu\/chu-pong\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/academic.csuohio.edu\/chu-pong\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/academic.csuohio.edu\/chu-pong\/wp-json\/wp\/v2\/users\/39"}],"replies":[{"embeddable":true,"href":"https:\/\/academic.csuohio.edu\/chu-pong\/wp-json\/wp\/v2\/comments?post=123"}],"version-history":[{"count":18,"href":"https:\/\/academic.csuohio.edu\/chu-pong\/wp-json\/wp\/v2\/pages\/123\/revisions"}],"predecessor-version":[{"id":328,"href":"https:\/\/academic.csuohio.edu\/chu-pong\/wp-json\/wp\/v2\/pages\/123\/revisions\/328"}],"wp:attachment":[{"href":"https:\/\/academic.csuohio.edu\/chu-pong\/wp-json\/wp\/v2\/media?parent=123"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}