{"id":270,"date":"2023-02-16T01:51:11","date_gmt":"2023-02-16T01:51:11","guid":{"rendered":"https:\/\/academic.csuohio.edu\/chu-pong\/?page_id=270"},"modified":"2023-02-16T01:51:11","modified_gmt":"2023-02-16T01:51:11","slug":"fpga-vhdl","status":"publish","type":"page","link":"https:\/\/academic.csuohio.edu\/chu-pong\/fpga-vhdl\/","title":{"rendered":"FPGA VHDL"},"content":{"rendered":"\n<h1 class=\"wp-block-heading\"><strong><em>FPGA Prototyping by VHDL Examples: Spartan-3 Version<\/em><\/strong><\/h1>\n\n\n\n<figure class=\"wp-block-image size-full is-resized\"><img loading=\"lazy\" decoding=\"async\" src=\"https:\/\/academic.csuohio.edu\/chu-pong\/wp-content\/uploads\/sites\/64\/2023\/02\/cover_vhdl0.jpg\" alt=\"\" class=\"wp-image-144\" width=\"140\" height=\"213\" srcset=\"https:\/\/academic.csuohio.edu\/chu-pong\/wp-content\/uploads\/sites\/64\/2023\/02\/cover_vhdl0.jpg 228w, https:\/\/academic.csuohio.edu\/chu-pong\/wp-content\/uploads\/sites\/64\/2023\/02\/cover_vhdl0-198x300.jpg 198w\" sizes=\"auto, (max-width: 140px) 100vw, 140px\" \/><\/figure>\n\n\n\n<p><strong>A&nbsp;<\/strong>n<a href=\"https:\/\/academic.csuohio.edu\/chu-pong\/fpga-vhdl-soc-book\/\" data-type=\"page\" data-id=\"220\" target=\"_blank\" rel=\"noopener\">ew edition<\/a><strong>&nbsp;of this text is available.<\/strong><\/p>\n\n\n\n<p>This web page provides relevant materials for the&nbsp;<em>FPGA Prototyping by VHDL Examples: Xilinx Spartan-3 Version<\/em>&nbsp;text<\/p>\n\n\n\n<h3 class=\"wp-block-heading\">Reviews <\/h3>\n\n\n\n<ul class=\"wp-block-list\">\n<li>at <a rel=\"noopener\" href=\"https:\/\/www.amazon.com\/FPGA-Prototyping-Verilog-Examples-Spartan-3\/dp\/0470185325\" target=\"_blank\">Amazon <\/a><\/li>\n\n\n\n<li>&#8220;. . . Brimming with code examples, flowcharts, and other illustrations, the book serves as a good starting point for a development project. It\u2019s recommended to anyone looking to get started with FPGA prototyping using VHDL . . .&#8221;<br><a href=\"http:\/\/electronicdesign.com\/Articles\/Index.cfm?AD=1&amp;ArticleID=18133\">&#8211; David Maliniak, Electronic Design <\/a><\/li>\n\n\n\n<li>&#8220;. . . the book is well organized and contains many useful synthesizable VHDL examples . . . is indeed an excellent text for people who wish to learn FPGA and VHDL from practical examples and exercises . . .&#8221;<br><a href=\"http:\/\/www.reviews.com\/review\/review_review.cfm?review_id=136517\">&#8211; ACM Computing Reviews <\/a><\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\">Sample materials<\/h3>\n\n\n\n<ul class=\"wp-block-list\">\n<li><a href=\"https:\/\/academic.csuohio.edu\/chu-pong\/wp-content\/uploads\/sites\/64\/2023\/02\/fpga_vhdl_preface.pdf\" data-type=\"attachment\" data-id=\"275\" target=\"_blank\" rel=\"noopener\">Preface<\/a> and <a href=\"https:\/\/academic.csuohio.edu\/chu-pong\/wp-content\/uploads\/sites\/64\/2023\/02\/fpga_vhdl_toc.pdf\" data-type=\"attachment\" data-id=\"278\">Table of Contents<\/a><\/li>\n\n\n\n<li><a href=\"https:\/\/academic.csuohio.edu\/chu-pong\/wp-content\/uploads\/sites\/64\/2023\/02\/fpga_vhdl_sample_chapter.pdf\" data-type=\"attachment\" data-id=\"276\">Sample chapter\u00a0on UART<\/a> <br>(copyrighted by John, Wiley &amp; Sons and cannot be printed or reposted on the web)<\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Source codes<\/strong> <strong>(last updated 03\/21\/2008)<\/strong><\/h3>\n\n\n\n<ul class=\"wp-block-list\">\n<li><a href=\"https:\/\/academic.csuohio.edu\/chu-pong\/wp-content\/uploads\/sites\/64\/2023\/02\/fpga_vhdl_src.zip\" data-type=\"attachment\" data-id=\"277\">source code zip file<\/a><\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\"><strong><strong>FAQ (last updated 06\/24\/2008)<\/strong><\/strong><\/h3>\n\n\n\n<ul class=\"wp-block-list\">\n<li><a href=\"https:\/\/academic.csuohio.edu\/chu-pong\/wp-content\/uploads\/sites\/64\/2023\/02\/fpga_vhdl_faq.pdf\" data-type=\"attachment\" data-id=\"274\" target=\"_blank\" rel=\"noopener\">pdf file<\/a><\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\">Errata <strong>(last updated 03\/21\/2008)<\/strong><\/h3>\n\n\n\n<ul class=\"wp-block-list\">\n<li><a href=\"https:\/\/academic.csuohio.edu\/chu-pong\/wp-content\/uploads\/sites\/64\/2023\/02\/fpga_vhdl_errata.pdf\" data-type=\"attachment\" data-id=\"273\" target=\"_blank\" rel=\"noopener\">pdf file<\/a><\/li>\n<\/ul>\n\n\n\n<div style=\"height:18px\" aria-hidden=\"true\" class=\"wp-block-spacer\"><\/div>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Instructional materials<\/strong><\/h3>\n\n\n\n<p>The files are for the course instructors only and are password protected.&nbsp;Please send Dr. Chu an e-mail with a web link that can verify your status.&nbsp;<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><a href=\"https:\/\/drive.google.com\/drive\/folders\/1BuQ5Aa_d6sZCUraWe8PEeZy21iE0YeOR?usp=sharing\">Figures and tables <\/a><\/li>\n<\/ul>\n","protected":false},"excerpt":{"rendered":"<p>FPGA Prototyping by VHDL Examples: Spartan-3 Version A&nbsp;new edition&nbsp;of this text is available. This web page provides relevant materials for the&nbsp;FPGA Prototyping by VHDL Examples: Xilinx Spartan-3 Version&nbsp;text Reviews Sample materials Source codes (last updated 03\/21\/2008) FAQ (last updated 06\/24\/2008) Errata (last updated 03\/21\/2008) Instructional materials The files are for the course instructors only and&mldr;<\/p>\n","protected":false},"author":39,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"_relevanssi_hide_post":"","_relevanssi_hide_content":"","_relevanssi_pin_for_all":"","_relevanssi_pin_keywords":"","_relevanssi_unpin_keywords":"","_relevanssi_related_keywords":"","_relevanssi_related_include_ids":"","_relevanssi_related_exclude_ids":"","_relevanssi_related_no_append":"","_relevanssi_related_not_related":"","_relevanssi_related_posts":"","_relevanssi_noindex_reason":"","footnotes":""},"class_list":["post-270","page","type-page","status-publish","hentry"],"featured_image_src":null,"_links":{"self":[{"href":"https:\/\/academic.csuohio.edu\/chu-pong\/wp-json\/wp\/v2\/pages\/270","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/academic.csuohio.edu\/chu-pong\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/academic.csuohio.edu\/chu-pong\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/academic.csuohio.edu\/chu-pong\/wp-json\/wp\/v2\/users\/39"}],"replies":[{"embeddable":true,"href":"https:\/\/academic.csuohio.edu\/chu-pong\/wp-json\/wp\/v2\/comments?post=270"}],"version-history":[{"count":3,"href":"https:\/\/academic.csuohio.edu\/chu-pong\/wp-json\/wp\/v2\/pages\/270\/revisions"}],"predecessor-version":[{"id":279,"href":"https:\/\/academic.csuohio.edu\/chu-pong\/wp-json\/wp\/v2\/pages\/270\/revisions\/279"}],"wp:attachment":[{"href":"https:\/\/academic.csuohio.edu\/chu-pong\/wp-json\/wp\/v2\/media?parent=270"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}